Wednesday, January 25, 2012

Urgent opening for VHDL/Verilog Engineer

Title : Sr. Hardware Engineer
Location : Bangalore
Experience : 3-5 Years


Description:
·        Familiarity with Verilog/VHDL and RTL simulations(modelsim is preferred)
·        BIST insertion with any EDA tool at chip level is mandatory
·        Familiarity with DC synthesis
·        Knowledge on Perl/TCL scripts is mandatory
·        Formal verification with LEC, and debug is preferred
·        Gate level simulation and debug with Modeltech Vsim is a must
Atul Kumar
Global Edge Software Ltd
atul.kumar@globaledgesoft.com

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